A C-like hardware description language adding HLS-like automatic pipelining
PipelineC A C-like(1) hardware description language (HDL)(2) adding HLS(high level synthesis)-like automatic pipelining(3) as a language construct/compiler feature. Not actually regular C. But mostly compileable by gcc for doing basic functional verification/’simulation’.This is for convenience as a familiar bare minimum language prototype, not as an ideal end goal. Reach out to help develop something more complex together! Can reasonably replace Verilog/VHDL. Compiler produces synthesizable and human readable+debuggable VHDL. Hooks exist for inserting raw VHDL / existing IP / black boxes. […]
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